Questions we get all the time.

An end-of-life semiconductor is an integrated circuit that the manufacturer has formally discontinued. Once a chip is EOL, the manufacturer stops producing it and issues a Product Discontinuation Notice (PDN or PCN) with a last-time-buy date.

After that date, the only sources are remaining distributor inventory and the gray market — both of which dry up over time and carry increasing counterfeit risk. Products still shipping on that chip are on a slow countdown toward either a redesign or a supply failure.

A pin-compatible chip drops directly into the original footprint with no intermediate hardware. An adapter board, by contrast, is a small daughter board that mounts in the original chip's footprint and hosts a modern replacement chip on top, with level shifting, pin remapping, configuration flash, and glue logic handled onboard.

Adapters exist because most modern replacements are not actually pin-compatible with their EOL predecessors. They use different voltages (1.2V core instead of 3.3V), different packages (BGA instead of TQFP), and reorganized pinouts. This is especially true for FPGAs and CPLDs, where successor generations typically move to ball-grid array packages with different bank layouts. The adapter is the translator.

Most can. The practical limits are:

Timing-critical analog or RF parts where the adapter's physical parasitics would affect behavior in ways that can't be compensated for.

Parts with encrypted firmware or active licensing enforcement that cannot be replicated legally or technically.

We run a 5-business-day feasibility assessment on every intake and tell you honestly whether your specific part is a good candidate before you commit to engineering work.

Send us the EOL part number, annual volume, and a one-line description of your application. That's enough to run feasibility.

You can use our intake form or email engineering@phatcat.tech directly. We'll come back within 5 business days with a feasibility assessment and, if applicable, a fixed-fee engineering quote.

Stock catalog adapters ship in 2 to 6 weeks, depending on inventory and the size of your order.

Custom-engineered adapters typically take 6 to 10 weeks from signed statement of work to qualified prototype.

Reverse-engineering projects for undocumented parts take 12 to 20 weeks depending on the complexity of the original chip.

Stock catalog adapters carry only a per-unit price with no engineering fee.

Custom engineering projects have a fixed-fee non-recurring engineering (NRE) charge that depends on chip complexity, plus per-unit production pricing. Per-unit pricing is volume-tiered.

We provide a firm quote during feasibility, before any engineering work begins. There are no hourly-billing surprises once we've started.

For stock catalog adapters, the minimum order is 10 units.

For custom engineering projects, the economics typically make sense above a few hundred units per year or a project value that justifies the fixed NRE fee. We do take on low-volume custom projects for service and repair programs when total lifetime units exceed about 100.

Yes — and we don't charge for it.

Most customers start with a single email or phone call describing their EOL part, their application, and their expected volume. We respond with an initial feasibility read within 5 business days, at no cost. Only once you decide to proceed do we issue a formal engineering quote.

Exclusively through authorized distribution. No brokers, no gray market, no parts of unknown provenance.

Every adapter ships with lot-traceable documentation showing where the replacement silicon came from and when it was authenticated. This is a hard rule — we will not use non-authorized sources even if it extends lead time.

Yes. Our standard capability covers DIP, SOIC, PLCC, QFP, QFN, SSOP, TSSOP, and BGA packages down to 0.5 mm ball pitch.

Finer-pitch BGA and specialty packages (ceramic, flatpack, hermetic) are available on a project basis — contact us to discuss feasibility.

Verification happens on three independent axes:

Electrical. Every adapter is bench-measured against the original datasheet for I/O voltage levels, drive strength, input thresholds, and quiescent current across temperature and voltage corners.

Timing. For FPGA and CPLD adapters, static timing analysis on the target silicon is closed against your original constraints. Critical paths are then bench-measured pin-to-pin with calibrated probes.

Functional. Your working reference part and the adapter run side-by-side on a test fixture that exercises real I/O patterns, and the two are compared signal-by-signal.

You receive the raw measurement data, not just a pass/fail summary.

We can often work from the bitstream alone. Unencrypted .bit, .mcs, .pof, .sof, or .jed files can be characterized against the original working silicon and re-implemented on the new fabric.

If the bitstream is encrypted or bound to a specific device serial, behavioral recovery becomes significantly harder and sometimes not feasible. We assess this during the 5-business-day feasibility review.

When source is available, we also handle toolchain migration — ISE to Vivado for Xilinx, Quartus II to Quartus Prime for Altera/Intel, and equivalent forward-ports for Lattice and Microsemi toolchains.

Sometimes — but only for digital-logic blocks. We can reverse-engineer the functional behavior of custom ASICs that were designed as combinational logic, sequential state machines, or digital signal-processing blocks, provided the customer has a documented use case and working reference parts.

We do not reverse-engineer analog blocks, RF front-ends, mixed-signal converters (ADCs/DACs), encrypted firmware, crypto accelerators with active IP enforcement, or parts where replication would infringe a currently enforced patent.

We focus on long-lifecycle industries where certification cost makes PCB redesign prohibitive: aerospace and defense, medical devices, industrial control and automation, automotive and transportation, energy and utilities, and legacy service and aftermarket programs.

We'll also work with commercial electronics where the unit economics make sense.

Yes. We can deliver adapters under AS9100-aligned quality programs with full lot traceability, certificates of conformance, and distributor pedigree documentation.

Specific military standards (MIL-STD-883, MIL-PRF-38535) and radiation-tolerant replacements require project-specific scoping. Contact us for qualified discussions under NDA.

Because the host PCB is unchanged, most mechanical certifications, enclosure filings, and EMC test reports carry forward without amendment.

Electrical re-qualification of the adapter itself is usually scoped as an incremental delta rather than a full retest. We provide the supporting documentation package to make this case to your regulatory or quality team, but the certification decision is ultimately yours.

Every engagement starts with an optional mutual non-disclosure agreement before intake. All schematics, firmware, timing traces, and reverse-engineered behavior are treated as customer-owned.

We never reuse a customer's design, board layout, or characterization data on another client's project. IP assignment of the adapter design itself can be structured into the statement of work on request.